change priority of jobs in sun grid engine (SGE) que

without admin access, we can only deprioritize the jobs that we don't want to run sooner [link]:

>qalter -p -1023

-1023 means lowest priority ....

how to save qrc extraction net in spectre sim

this post explain how to use wildcard matching to save qrc extraction netnames in a spectre sim.

changing reltol settings within a transient spectre sim

here is an example of how to set parameters to dynamically change reltol (or temperature) settings within a spectre transient simulation.

series vs. parallel RC circuit

$\frac{\delta C_P}{\delta Q} = \frac{2Q}{\left(1+Q^2)\right)^2} \times C_S$.
for $Q>0$, $C_P$ drops monotonically when $Q$ decreases.

slicide vs. non-silicide resistors

high resistance resistors: non-silicide

poly resistors: slicide-block mask should be used

poly gate contacts: silicide to enhance speed 

silicon on insulator CMOS

the picture speaks about the difference in topology of the device. The device at the top is a normal CMOS that the diffusion is implanted in the substrate but the one at the bottom, the substrate is insulated with an oxide region from the part of silicon that would construct the device channel. The benefits are: lower leakage, lower substrate noise to the channel, no body connection is required, device can operate lower than VDD, etc.

Logical Effort: design logics in CMOS

so far found the following chapters of "Logical Efforts" by Sutherland, Sproull, and Harris:
Chapter 1: The Method of Logical Effort
Chapter 4: Calculating the Logical Effort of Gates
Chapter 10: Circuit Families

and this presentation slide by Harris.

Deep N Well to isolate nmos devices

deep N wells are used in customized analog layouts where (a) nmos base voltage is not connected to ground (e.g. to avoid body effect), or (b) noise reduction is important. In the latter case, by putting nmos's P well in an n-well/ ring, P substrate noise cannot go to nmos device pins. More details in this post from Planet Analog.

Phase noise measurements

This document presents two methods for measure phase noise of a dut.

Transforms and Applications Handbook

"Transforms and Applications Handbook" is a handbook of transform functions. I came across this reference in the Hilbert transform introduction by Frank Kschischang.

Current Mode Logic Active Inductor Load

Active inductor load can be designed by applying a negative voltage feedback from drain of an active current load to the gate of the active load. The feedback has a time constant that depends on the size of gate resistor and Cgs of the active load. Overall, feedback makes the load to behave like an inductor where $L=\frac{R_g C_{gs}}{g_m}$. For more details refer to page 68 of this Master's thesis. The following image is also captured from the thesis.

Spectre Simulation (Fundamental)

"Simulation of Analog and Mixed-Signal Circuits by Ken Kundert" slides are a quick review of the book, "The Designer's Guide to SPICE and Spectre". The book goes through the details of spice simulation and explains the trad-offs.

CMOS chopper amplifier to reduce 1/f noise

The paper reviews CMOS chopper amplifier theory and actual circuit. The theory is simple: modulate the input signal to F_chopper where 1/f noise is not significant, amplify the modulated signal. and finally demodulate and reconstruct low pass signal at the output. Also, found this work interesting: using CMOS devices in lateral bipolar mode to decrease 1/f noise (see figure 14).

Noise Sources in Bulk CMOS

A nice summary on CMOS noise sources(flicker, shot, thermal).

Voltage Mode R-2R DAC: Theory of Operation

This document is about "how voltage mode R-2R DAC does work?". A major goal is to extract the math behind R-2R DAC intuitive structure.

Random DC Offset of Comparators

These slides review Flash ADC circuits. The source of random DC offset is the random fabrication mismatch. The reference paper, "Matching Properties of CMOS Transistors" (1989) divides the mismatch to two models: local and global.

Charge Injection in CMOS switches

"Charge Injection in Analog CMOS Switches" (1987) presents a model for charge injection. It also proposes some methods to alleviate charge injection by design.

Serial Charge Redistribution DAC

The slides introduce ABC of charge redistribution DAC.

Fractional Frequency Divider by Delta-Sigma Modulator

"Delta-sigma modulation in fractional-N frequency synthesis" (1993) compares pulse swallowing, phase interpolation, and Wheatley random jittering methods with Delta-Sigma jittering technique.

CMOS Capacitance and Delay

handy notes on CMOS delay. Analyse the capacitance and connect it to delay of circuits (driver load and total load capacitance).